The present invention relates to a chip resistor having a low resistance of, for example, no more than 1 Ω, and to a method of making the same.
As a prior art document, JP-A-2001-118701 proposes a chip resistor 1 constructed as shown in FIG. 1.
Specifically, the resistor element 2 of a chip resistor 1 of the prior art is formed in rectangular shape of metal plate of thickness T0, length L and width W, and made of a material such as an alloy constituted by adding metal having higher resistance such as nickel to a substrate metal having a low resistance such as copper. Connection terminal electrodes 4, 5 are provided in portions at the left and right ends of the lower surface of this resistor element 2, by using cutting processing to cut a recess 3 of length L0 and depth S in about the middle of the lower surface of this resistor element 2. In addition, plating layers 6, 7 are formed on these two connection terminal electrodes 4 and 5 in order to facilitate soldering to a printed circuit board, for example.
Also, in JP-A-2001-118701, when manufacturing a chip resistor constructed as described above, a method of manufacturing is proposed wherein plating layers 6, 7 for soldering are formed in a portion of each of the connection terminal electrodes 4 and 5 by plating processing in a condition with a resist mask for partial plating applied to the lower surface of the metal plate blank, the blank being formed by a large number of resistors arranged side by side in integrated fashion, and after cutting the recess 3 in the lower surface of the metal plate blank by cutting processing, the metal plate blank is then cut into each of the resistor elements.
However, with the chip resistor 1 of the prior art, there is a considerable risk that, when soldering onto the printed circuit board or the like, molten solder will become attached to portions between the two connection terminal electrodes 4, 5 on the resistor element 2 beyond the two connection terminal electrodes 4, 5, thereby producing a change in the resistance. In order to avoid this, the depth S in the recess 3 of the lower surface of the resistor element 2 may be made greater, but, if an attempt is made to increase the depth S in the recess 3 without changing the thickness T of the resistor element between the connection terminal electrodes, the overall height of the chip resistor 1 is increased and the weight is increased.
Also, in the method of manufacture of the prior art, it is arranged to form plating layers 6, 7 for soldering solely on the portions of the connection terminal electrodes 4, 5 by performing plating treatment in a condition with a resist mask for partial plating applied to the lower surface of the metal plate blank. In this manner, the manufacturing costs can be greatly increased due to the need for a step of forming a resist mask for partial plating beforehand on the lower surface of the metal plate blank prior to the plating step of forming the plating layers 6, 7 for the soldering, and also a step of separating and removing the resist mask for the partial plating after the plating step.